Job Description

Seattle, Washington, United States Hardware

Description

APPLE INC has the following available in Seattle, Washington. Verify complex graphics processing unit (GPU) register-transfer level (RTL) designs. Develop and drive verification plans. Work with architects to identify functional and performance flaws in design specification. Create vertically reusable test bench environments to stimulus and check RTL design. Generate constrained random and directed tests to implement verification plans. Run simulations and debug issues across hardware and software. Create verification test bench components to monitor and check designs. Create functional coverage points, analyze coverage, and enhance test environments to target coverage holes. Create automated verification flows for graphics core verification. 40 hours/week. At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $137,259 - $204,000/yr and your base pay will depend on your skills, qualifications, experience, and location.PAY & BENEFITS: Apple employees also have the opportunity to become an Apple shareholder through participation in Apples discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apples Employee Stock Purchase Plan. Youll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

Minimum Qualifications

• Master's degree or foreign equivalent in Electrical Engineering, Electronics Engineering, Computer Science, Computer Engineering or related field and 2 years of experience in the job offered or related occupation.
• 2 years of experience with each of the following skills:
• Utilizing Computer Architecture concepts, including pipelined designs, caches, superscalar architecture, and multithreading, to understand graphics processing unit (GPU) architecture specifications.
• Experience in ASIC Design, including experience in frontend Logic Design and Verification, understanding data flow of various functional blocks of graphics processing unit (GPU), and developing a functional and performance verification plan.
• Using SystemVerilog coding to develop vertically reusable testbench environments.
• Experience in developing UVM testbench environments by utilizing knowledge of OOPs concepts like, polymorphism, inheritance, and data encapsulation.
• Experience in developing constraint random stimulus for industry standard bus protocols, such as AXI/AHB, running simulations with x-propagation, and performing gate-level and power aware simulations.
• Applying UVM, standard methodology for verification, to develop modular, scalable and reusable testbench components.
• Experience in industry standard Simulators to compile and run testbench environment, and verify the correctness of GPU IP blocks.

Preferred Qualifications

• N/A

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant .

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